The present invention relates to semiconductor packaging and, more particularly, to a packaged semiconductor device that has electrically conductive external protrusions in the form of a ball grid array or other similar array of external connectors.
There are numerous types of semiconductor packages. Such packages are typically formed with a semiconductor die mounted on a non-conductive substrate or lead frame. External connectors on either the substrate or leads of the lead frame are wire bonded to die connection pads on the die to provide a means of easily electrically connecting the die to circuit boards and the like. After the connectors and pads are wire bonded, the semiconductor die and connectors are encapsulated (packaged) in a compound such as a plastics material leaving external pads of the substrate or sections of the leads exposed. The external connectors or exposed leads provide external electrical connection of the die to a circuit board.
Semiconductor devices (packaged semiconductor die) are assembled (manufactured) with increasing numbers of external connectors (i.e., increasing pin or lead count). The electronics industry has attempted to increase the density of die contacts as the number of signal and power lines has increased by using wire bond lead connection techniques and ball grid array (BGA) connections. However, the wire bond lead connections are peripheral pads that are typically arranged on all sides of a packaged device. These leads are relatively large and thus increase the minimum obtainable size of the packaged device.
In contrast, a BGA device has a semiconductor die mounted or attached to a carrier substrate. Solder balls are affixed to a lower surface of the carrier substrate and the minimum obtainable size of the packaged device can be smaller than that of a wire bond lead connection type device. Although BGA devices provide a useful alternative to wire bond lead connection type devices, the carrier substrate is susceptible to warping during solder reflowing when the BGA device is being mounted to a Printed Circuit Board (PCB). This warping usually takes the form of an external PCB facing surface of the carrier substrate deforming from a planar surface into a slightly convex surface, which may cause poor soldered connections or open circuits. It would therefore be useful if the probability of BGA, or other grid array, carrier substrate warping could be reduced or at least alleviated.